REPARA-FP7

REPARA - Reengineering and Enabling Performance and poweR of Applications

In recent years, traditional processors have not been able to translate the advances of silicon fabrication technology into corresponding performance gains. This has been due to weaknesses inherent in the current sequential programming model, which has not changed significantly since the late 1940’s, as well as due to physical constraints, such as practical limits on the energy consumption and the associated cooling efforts for a processor. To keep satisfying the ever-growing demand for computing power, these difficulties have forced a shift from homogeneous machines relying on a one single kind of fast processing element (the CPU) such as typical PCs some years ago, programmed mostly sequentially, to heterogeneous architectures combining different kinds of processors (such as CPUs, GPUs and DSPs) each specialized for certain tasks (as PCs nowadays), and programmed in a highly parallel fashion yet poorly optimising the available resources towards performance and low energy consumption.

Goal

The REPARA project aims to help the transformation and deployment of new and legacy applications in parallel heterogeneous computing architectures while maintaining a balance between application performance, energy efficiency and source code maintainability.

Objectives

  • O1: Language representation.
  • O2: Application partitioning.
  • O3: Source code transformation.
  • O4: Compilation into reconfigurable hardware.
  • O5: Software quality modelling.
  • O6: Runtime engines.
  • O7: Framework validation.

Project Funding

  • This project is co-funded by the Seventh Framework Programme (FP7).
  • Total cost: 3,682,223 €.
  • Funding: 2,671,000 €.
  • Start date: 1 September 2013.
  • Duration: 36 months.

FP7

Consortium

The REPARA project joins forces of experts in software engineering methodology, development tools, computer hardware design and analysis, all working hand-in-hand with industrial end-users to achieve a unified programming model for heterogeneous computers developing also the required automated software support tools.

Official project home page

http://repara-project.eu/

Academic Participants

University Carlos III of Madrid

The University Carlos III of Madrid (Spain) coordinates this project and participates through its ARCOS research group.

Key Personnel:

  • Prof. J. Daniel Garcia (Project Coordinator).
  • Dr. Luis M. Sánchez.

HSR Rapperswil

HSR Rapperswil (Switzerland) participates through its IFS Institute for Software.

Key Personnel:

  • Prof. Peter Sommerlad.

Technische Universität Darmstadt

Technische Universität Darmstadt (Germany) participates through its Embedded Systems and Applications research group.

Key Personnel:

  • Prof. Andreas Koch.

University of Szeged

University of Szeged (Hungary) participates through its Software Engineering Department.

Key Personnel:

  • Dr. Rudolf Ferenc.
  • Dr. Ákos Kiss.

Universita di Pisa

Universita di Pisa (Italy) participates through its Department of Computer Science.

Key Personnel:

  • Dr. Massimo Torquati.
  • Dr. Marco Danelutto.

Industrial Participants

Evopro Innovation

Evopro Innovation Kft (Hungary) brings to the project applications in the fields of healthcare and railways.

Key Personnel:

  • Dr. Zsolt Szepessy.

IXION industry and aerospace

IXION industry and aerospace SL (Spain) brings to the project applications in the field of computer vision applied to mobile robots, security systems and industry.

Key Personnel:

  • Dr. Jorge Villagrá.